ppt Interconnect estimation for FPGA's

•As density increases placement and routing for FPGAs need more careful attention to achieve successful design closure.

•Interconnect during the design stage is the process of predicting the routing resource requirement that the design may pose at the later stage.

•

•The design stage at which the estimation is done determines the reliability and accuracy that is demanded of the estimation method.

•

•The estimation at this stage should track modern back end routers so that the design meets the requirements. 

Download PPT